Microchip Technology /ATSAME54P19A /SDHC0 /NISTER

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Interpret as NISTER

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MASKED)CMDC 0 (MASKED)TRFC 0 (MASKED)BLKGE 0 (MASKED)DMAINT 0 (MASKED)BWRRDY 0 (MASKED)BRDRDY 0 (MASKED)CINS 0 (MASKED)CREM 0 (MASKED)CINT

CINS=MASKED, DMAINT=MASKED, TRFC=MASKED, BLKGE=MASKED, CINT=MASKED, BRDRDY=MASKED, BWRRDY=MASKED, CMDC=MASKED, CREM=MASKED

Description

Normal Interrupt Status Enable

Fields

CMDC

Command Complete Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

TRFC

Transfer Complete Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

BLKGE

Block Gap Event Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

DMAINT

DMA Interrupt Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

BWRRDY

Buffer Write Ready Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

BRDRDY

Buffer Read Ready Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

CINS

Card Insertion Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

CREM

Card Removal Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

CINT

Card Interrupt Status Enable

0 (MASKED): Masked

1 (ENABLED): Enabled

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